Krzysztof Berezowski, Ph. D.


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Krzysztof  Berezowski

I received my Ph.D. degree in Computer Engineering from Wroclaw University of Technology, Wroclaw, Poland in 2002. My general area of research interest is in computer systems architecture and my research has included VLSI digital circuit design, energy-efficient computational artifacts for digital signal processing, computer arithmetic (mainly residue number system), threshold logic and its applications to energy-efficient digital systems design, thermal modeling and simulation of multicore processors, embedded systems, M2M communication, DASH7 protocol stack, Internet of Things.

Currently I am an assistant professor affiliated with the Institute of Computer Engineering, Control and Robotics, Wroclaw University of Technology, Wroclaw, Poland. In 2004, I was a short-term visiting scholar with the Center for Low Power Electronics of the University of Arizona, Tucson, Arizona. In 2006, I was awarded the European Framework Programme 6th Marie Curie Actions Outgoing International Fellowship (codenamed: RESPONS), that I spent partially with the VLSI Electronic Design Automation Laboratory at the Arizona State University, Tempe, AZ (01/09/2007-31/08/2009), and with the Concurrent Integrated Systems Group at the TIMA Laboratory, Grenoble, France (01/09/2009-31/08/2010). During that period of time I was working on differential threshold logic and its applictions to high-performance power-efficient digital VLSI design.

In Dec 2011 I was a participant of Zielony transfer (in polish) - a Transfer of Knowledge type of project funded by the European Commission's Human Capital Programme and coordinated by the Municipality of Wrocław through Wroclaw Academic Hub aimed at forging collaboration between academic researchers and local industry. As an awardee of the programme, from 01/2011 to 06/2012 he has been holding a Senior Research Specialist position at REC-global - a Wrocław headquartered SME with global operations - working on Low-Rate Wireless Personal Area Network applications. His interests have been focused on 433MHz ISM band operation and its applications to precision horticulture as well as in automotive infotainment systems.

In Oct 2012 I became a Technical Advisory on the board of Arynga, Inc. - a startup company headquartered in San Diego, California developing future automotive technologies and products. 

In Feb 2013 I have been selected to participate in the TOP500 Innovators programme, that I will spend with the Haas School of Business, University of Berkeley, California from Oct 2013 to December 2013.

See my more up to date resume on my linkedin profile.

Follow me on twitter.

My current research projects:

Current MSc projects that I supevise:

  • Scalable distributed smart sensor platform
  • Linux operating system in embedded applications utilizing duty cycle regime
  • Mobile node localization and positioning in WiFi networks
  • Node localization and positioning in wireless sensor networks with hardware support for time of flight measurements
  • Node localization and positioning algorithms
  • Remote GPGPU computing platform for mobile applications
  • Remote high-performance GPGPU computing platform
  • The design of a process variation resilient sense amplifier based differential threshold logic gate
  • Soft real time in Android OS for automotive applications

 


Recent publications


Journal Articles

P. Weber, M. Zagrabski, B. Wojciechowski, M. Nikodem, K. Kȩpa, and K. Berezowski : Calibration of RO-based temperature sensors for a toolset for measuring thermal behavior of FPGA devices, Microelectronics Journal, ISSN: 0026-2692, 2014, URL, DOI, BibTeX
@ARTICLE{Weber2014,
  author = {Paweł Weber and Maciej Zagrabski and Bartosz Wojciechowski and Maciej Nikodem and Krzysztof Kȩpa and Krzysztof Berezowski},
  title = {{Calibration of RO-based temperature sensors for a toolset for measuring thermal behavior of FPGA devices}},
  journal = {{Microelectronics Journal}},
  publisher = {{Elsevier}},
  number = {0},
  month = {Jul},
  year = {2014},
  issn = {0026-2692},
  doi = {http://dx.doi.org/10.1016/j.mejo.2014.06.004},
  url = {http://www.sciencedirect.com/science/article/pii/S0026269214002031},
  keywords = {process variance}
}
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P. Śliwiński, K. Berezowski, P. Patronik, and P. Wachel : Efficiency analysis of the autofocusing algorithm based on orthogonal transforms, Journal of Computer and Communications, vol.1(6), ISSN: 2327-5219, 2013, pp. 41-45, BibTeX
@ARTICLE{2013a,
  author = {Przemysław Śliwiński and Krzysztof Berezowski and Piotr Patronik and Paweł Wachel},
  title = {{Efficiency analysis of the autofocusing algorithm based on orthogonal transforms}},
  journal = {{Journal of Computer and Communications}},
  volume = {1},
  number = {6},
  year = {2013},
  issn = {2327-5219},
  pages = {41-45}
}
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B. Wojciechowski, K. Berezowski, P. Patronik, and J. Biernat : Fast and accurate thermal modeling and simulation of manycore processors and workloads, Microelectronics Journal, vol.44(11), 2013, pp. 986–993, URL, DOI, BibTeX
@ARTICLE{wojciechowski2013fast,
  author = {B. Wojciechowski and K. Berezowski and P. Patronik and J. Biernat},
  title = {{Fast and accurate thermal modeling and simulation of manycore processors and workloads}},
  journal = {{Microelectronics Journal}},
  volume = {44},
  number = {11},
  year = {2013},
  pages = {986–993},
  doi = {10.1016/j.mejo.2012.08.001},
  url = {http://www.sciencedirect.com/science/article/pii/S0026269212001875},
  keywords = {processor thermal characterisation}
}
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K. Berezowski : The Landscape of Wireless Sensing in Greenhouse Monitoring and Control, International Journal of Wireless \& Mobile Networks (IJWMN), vol.4(4), 2012, pp. 141-154, BibTeX
@ARTICLE{berezowski2012landscape,
  author = {K. Berezowski},
  title = {{The Landscape of Wireless Sensing in Greenhouse Monitoring and Control}},
  journal = {{International Journal of Wireless \& Mobile Networks (IJWMN)}},
  volume = {4},
  number = {4},
  month = {Aug},
  year = {2012},
  pages = {141-154}
}
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T. Gowda, S. Vrudhula, N. Kulkarni, and K. Berezowski : Identification of Threshold Functions and Synthesis of Threshold Networks, IEEE Trans. on CAD of Integrated Circuits and Systems, vol.30(5), 2011, pp. 665-677, BibTeX
@ARTICLE{DBLP:journals/tcad/GowdaVKB11,
  author = {T. Gowda and S. Vrudhula and N. Kulkarni and K. Berezowski},
  title = {{Identification of Threshold Functions and Synthesis of Threshold Networks}},
  journal = {{IEEE Trans. on CAD of Integrated Circuits and Systems}},
  volume = {30},
  number = {5},
  year = {2011},
  pages = {665-677}
}
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S. Piestrak and K. Berezowski : Design of residue multipliers-accumulators using periodicity, IET Irish Signals and Systems Conference, 2008, pp. 380-385, BibTeX
@ARTICLE{piestrak2008design,
  author = {Stanislaw Piestrak and Krzysztof Berezowski},
  title = {{Design of residue multipliers-accumulators using periodicity}},
  journal = {{IET Irish Signals and Systems Conference}},
  publisher = {{IET}},
  year = {2008},
  pages = {380-385}
}
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K. Berezowski and S. Vrudhula : Multiple-valued logic circuits design using negative differential resistance devices, Journal of Multiple-Valued Logic and Soft Computing, vol.13(), 2007, pp. 447-466, BibTeX
@ARTICLE{2007a,
  author = {Krzysztof Berezowski and Sarma Vrudhula},
  title = {{Multiple-valued logic circuits design using negative differential resistance devices}},
  journal = {{Journal of Multiple-Valued Logic and Soft Computing}},
  volume = {13},
  number = {4-6},
  year = {2007},
  pages = {447-466}
}
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K. Berezowski : Compact binary logic circuits design using negative differential resistance devices, Electronics Letters, vol.42(16), 2006, pp. 902-903, BibTeX
@ARTICLE{2006a,
  author = {Krzysztof Berezowski},
  title = {{Compact binary logic circuits design using negative differential resistance devices}},
  journal = {{Electronics Letters}},
  volume = {42},
  number = {16},
  year = {2006},
  pages = {902-903}
}
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Conference Papers

P. Weber, M. Zagrabski, B. Wojciechowski, Krzysztof S. Berezowski, M. Nikodem, and K. Kepa : Toolset for Measuring Thermal Behavior of FPGA Devices, Proceedings of 19th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC 2013), ISBN: 978-1-4799-2271-0, 2013, pp. 48-53, PDF, BibTeX
@INPROCEEDINGS{2013a,
  author = {Paweł Weber and Maciej Zagrabski and Bartosz Wojciechowski and Krzysztof S. Berezowski and Maciej Nikodem and Krzysztof Kepa},
  title = {{Toolset for Measuring Thermal Behavior of FPGA Devices}},
  booktitle = {{Proceedings of 19th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC 2013)}},
  month = {Sep},
  year = {2013},
  isbn = {978-1-4799-2271-0},
  pages = {48-53}
}
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B. Wojciechowski, K. Berezowski, P. Patronik, and J. Biernat : Fast and accurate thermal simulation and modelling of workloads of many-core processors, Thermal Investigations of ICs and Systems (THERMINIC), 2011 17th International Workshop on, 2012, pp. 1-6, BibTeX
@INPROCEEDINGS{6081029,
  author = {B. Wojciechowski and K. Berezowski and P. Patronik and J. Biernat},
  title = {{Fast and accurate thermal simulation and modelling of workloads of many-core processors}},
  booktitle = {{Thermal Investigations of ICs and Systems (THERMINIC), 2011 17th International Workshop on}},
  month = {Sep},
  year = {2012},
  pages = {1-6},
  keywords = {fourier transforms, multi-threading, multiprocessing systems, thermal analysis, benchmark traces, core thermal status, few-component fourier expansion, many-core processors, multithreaded workload, power consumption, system throughput, thermal simulation, workload modelling, approximation methods, benchmark testing, computational modeling, instruction sets, mathematical model, microprocessors}
}
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M. Wesołowski, P. Patronik, K. Berezowski, and J. Biernat : Design of a Novel Flexible 4-moduli RNS and Reverse Converter, To appear in Proceedings of The 23rd IET Irish Signals and Systems Conference, 2012, BibTeX
@INPROCEEDINGS{Wesolowski2012,
  author = {M. Wesołowski and P. Patronik and K. Berezowski and J. Biernat},
  title = {{Design of a Novel Flexible 4-moduli RNS and Reverse Converter}},
  booktitle = {{To appear in Proceedings of The 23rd IET Irish Signals and Systems Conference}},
  month = {Jun},
  year = {2012},
  keywords = {rns}
}
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P. Patronik, K. Berezowski, J. Biernat, S. Piestrak, and A. Shrivastava : Design of an RNS reverse converter for a new five-moduli special set, ACM Great Lakes Symposium on VLSI, 2012, pp. 67-70, BibTeX
@INPROCEEDINGS{DBLP:conf/glvlsi/PatronikBBPS12,
  author = {P. Patronik and K. Berezowski and J. Biernat and S. Piestrak and A. Shrivastava},
  title = {{Design of an RNS reverse converter for a new five-moduli special set}},
  booktitle = {{ACM Great Lakes Symposium on VLSI}},
  year = {2012},
  pages = {67-70}
}
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P. Patronik, K. Berezowski, S. Piestrak, J. Biernat, and A. Shrivastava : Fast and energy-efficient constant-coefficient FIR filters using residue number system, Low Power Electronics and Design (ISLPED) 2011 International Symposium on, 2011, pp. 385-390, BibTeX
@INPROCEEDINGS{patronik2011fast,
  author = {Piotr Patronik and Krzysztof Berezowski and Stanisław Piestrak and Janusz Biernat and Aviral Shrivastava},
  title = {{Fast and energy-efficient constant-coefficient FIR filters using residue number system}},
  booktitle = {{Low Power Electronics and Design (ISLPED) 2011 International Symposium on}},
  year = {2011},
  pages = {385-390}
}
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P. Patronik, K. Berezowski, S. Piestrak, J. Biernat, and A. Shrivastava : Fast and energy-efficient constant-coefficient FIR filters using residue number system, ISLPED, 2011, pp. 385-390, BibTeX
@INPROCEEDINGS{DBLP:conf/islped/PatronikBPBS11,
  author = {P. Patronik and K. Berezowski and S. Piestrak and J. Biernat and A. Shrivastava},
  title = {{Fast and energy-efficient constant-coefficient FIR filters using residue number system}},
  booktitle = {{ISLPED}},
  year = {2011},
  pages = {385-390}
}
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S. Mhambrey, L. Clark, S. Maurya, and K. Berezowski : Out-of-order issue logic using sorting networks, ACM Great Lakes Symposium on VLSI, 2010, pp. 385-388, BibTeX
@INPROCEEDINGS{DBLP:conf/glvlsi/MhambreyCMB10,
  author = {S. Mhambrey and L. Clark and S. Maurya and K. Berezowski},
  title = {{Out-of-order issue logic using sorting networks}},
  booktitle = {{ACM Great Lakes Symposium on VLSI}},
  year = {2010},
  pages = {385-388}
}
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S. Leshner, N. Kulkarni, S. Vrudhula, and K. Berezowski : Design of a robust, high performance standard cell threshold logic family for DSM technology, Microelectronics (ICM), 2010 International Conference on, 2010, pp. 52-55, BibTeX
@INPROCEEDINGS{leshner2010design,
  author = {Samuel Leshner and Niranjan Kulkarni and Sarma Vrudhula and Krzysztof Berezowski},
  title = {{Design of a robust, high performance standard cell threshold logic family for DSM technology}},
  booktitle = {{Microelectronics (ICM), 2010 International Conference on}},
  year = {2010},
  pages = {52-55}
}
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S. Leshner, K. Berezowski, X. Yao, G. Chalivendra, S. Patel, and S. Vrudhula : A Low Power, High Performance Threshold Logic-Based Standard Cell Multiplier in 65 nm CMOS, ISVLSI, 2010, pp. 210-215, BibTeX
@INPROCEEDINGS{DBLP:conf/isvlsi/LeshnerBYCPV10,
  author = {S. Leshner and K. Berezowski and X. Yao and G. Chalivendra and S. Patel and S. Vrudhula},
  title = {{A Low Power, High Performance Threshold Logic-Based Standard Cell Multiplier in 65 nm CMOS}},
  booktitle = {{ISVLSI}},
  year = {2010},
  pages = {210-215}
}
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R. Chokshi, K. Berezowski, A. Shrivastava, and S. Piestrak : Exploiting residue number system for power-efficient digital signal processing in embedded processors, CASES, 2009, pp. 19-28, BibTeX
@INPROCEEDINGS{DBLP:conf/cases/ChokshiBSP09,
  author = {R. Chokshi and K. Berezowski and A. Shrivastava and S. Piestrak},
  title = {{Exploiting residue number system for power-efficient digital signal processing in embedded processors}},
  booktitle = {{CASES}},
  year = {2009},
  pages = {19-28}
}
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