Journal Articles

P. Patronik and Stanisław J. Piestrak : Design of Reverse Converters for the New RNS Moduli Set 2^N+1,2^N-1,2^N,2^N-1+1 ( n odd), Circuits and Systems I: Regular Papers, IEEE Transactions on, vol.PP(99), ISSN: 1549-8328, 2014, pp. 1-14, DOI, BibTeX
@ARTICLE{6895316,
  author = {Piotr Patronik and Stanisław J. Piestrak},
  title = {{Design of Reverse Converters for the New RNS Moduli Set 2^N+1,2^N-1,2^N,2^N-1+1 ( n odd)}},
  journal = {{Circuits and Systems I: Regular Papers, IEEE Transactions on}},
  volume = {PP},
  number = {99},
  year = {2014},
  issn = {1549-8328},
  pages = {1-14},
  doi = {10.1109/TCSI.2014.2337237},
  keywords = {adders, algorithm design, analysis, design methodology, digital signal processing, dynamic range, hardware, vectors, application-specific integrated circuit (asic), chinese remainder theorem (crt), computer arithmetic, digital signal processing (dsp), residue arithmetic, residue number system (rns), residue-to-binary converter, reverse converter}
}
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P. Patronik and S. Piestrak : Design of Reverse Converters for General RNS Moduli Sets {2^k, 2^n-1, 2^n+1, 2^(n+1)-1} and {2^k, 2^n-1, 2^n+1, 2^(n-1)-1} (n even), IEEE Trans. on Circuits and Systems, vol.61-I(6), 2014, pp. 1687-1700, URL, DOI, BibTeX
@ARTICLE{DBLP:journals/tcas/PatronikP14,
  author = {Piotr Patronik and Stanislaw Piestrak},
  title = {{Design of Reverse Converters for General RNS Moduli Sets {2^k, 2^n-1, 2^n+1, 2^(n+1)-1} and {2^k, 2^n-1, 2^n+1, 2^(n-1)-1} (n even)}},
  journal = {{IEEE Trans. on Circuits and Systems}},
  volume = {61-I},
  number = {6},
  year = {2014},
  pages = {1687-1700},
  doi = {10.1109/TCSI.2013.2290843},
  url = {http://dx.doi.org/10.1109/TCSI.2013.2290843}
}
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S. Piestrak and K. Berezowski : Design of residue multipliers-accumulators using periodicity, IET Irish Signals and Systems Conference, 2008, pp. 380-385, BibTeX
@ARTICLE{piestrak2008design,
  author = {Stanislaw Piestrak and Krzysztof Berezowski},
  title = {{Design of residue multipliers-accumulators using periodicity}},
  journal = {{IET Irish Signals and Systems Conference}},
  publisher = {{IET}},
  year = {2008},
  pages = {380-385}
}
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Conference Papers

P. Patronik, K. Berezowski, J. Biernat, S. Piestrak, and A. Shrivastava : Design of an RNS reverse converter for a new five-moduli special set, ACM Great Lakes Symposium on VLSI, 2012, pp. 67-70, BibTeX
@INPROCEEDINGS{DBLP:conf/glvlsi/PatronikBBPS12,
  author = {P. Patronik and K. Berezowski and J. Biernat and S. Piestrak and A. Shrivastava},
  title = {{Design of an RNS reverse converter for a new five-moduli special set}},
  booktitle = {{ACM Great Lakes Symposium on VLSI}},
  year = {2012},
  pages = {67-70}
}
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P. Patronik, K. Berezowski, S. Piestrak, J. Biernat, and A. Shrivastava : Fast and energy-efficient constant-coefficient FIR filters using residue number system, Low Power Electronics and Design (ISLPED) 2011 International Symposium on, 2011, pp. 385-390, BibTeX
@INPROCEEDINGS{patronik2011fast,
  author = {Piotr Patronik and Krzysztof Berezowski and Stanisław Piestrak and Janusz Biernat and Aviral Shrivastava},
  title = {{Fast and energy-efficient constant-coefficient FIR filters using residue number system}},
  booktitle = {{Low Power Electronics and Design (ISLPED) 2011 International Symposium on}},
  year = {2011},
  pages = {385-390}
}
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P. Patronik, K. Berezowski, S. Piestrak, J. Biernat, and A. Shrivastava : Fast and energy-efficient constant-coefficient FIR filters using residue number system, ISLPED, 2011, pp. 385-390, BibTeX
@INPROCEEDINGS{DBLP:conf/islped/PatronikBPBS11,
  author = {P. Patronik and K. Berezowski and S. Piestrak and J. Biernat and A. Shrivastava},
  title = {{Fast and energy-efficient constant-coefficient FIR filters using residue number system}},
  booktitle = {{ISLPED}},
  year = {2011},
  pages = {385-390}
}
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R. Chokshi, K. Berezowski, A. Shrivastava, and S. Piestrak : Exploiting residue number system for power-efficient digital signal processing in embedded processors, CASES, 2009, pp. 19-28, BibTeX
@INPROCEEDINGS{DBLP:conf/cases/ChokshiBSP09,
  author = {R. Chokshi and K. Berezowski and A. Shrivastava and S. Piestrak},
  title = {{Exploiting residue number system for power-efficient digital signal processing in embedded processors}},
  booktitle = {{CASES}},
  year = {2009},
  pages = {19-28}
}
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S. Piestrak and K. Berezowski : Architecture of efficient RNS-based digital signal processor with very low-level pipelining, Signals and Systems Conference, 208.(ISSC 2008). IET Irish, 2008, pp. 127-132, BibTeX
@INPROCEEDINGS{piestrak2008architecture,
  author = {Stanislaw Piestrak and Krzysztof Berezowski},
  title = {{Architecture of efficient RNS-based digital signal processor with very low-level pipelining}},
  booktitle = {{Signals and Systems Conference, 208.(ISSC 2008). IET Irish}},
  year = {2008},
  pages = {127-132}
}
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